In integrated circuit design, it is desirable to minimize the power that is used by maximizing efficiency of a chip. One way to do this is to minimize the number of registers that are “retention” registers (meaning, they retain data when no power is applied to the register), and thereby maximize the number of “non-retention” registers (meaning, registers that do not retain their data unless power is provided).
In the mobile electronics area where battery-driven devices are ubiquitous, power consumption has become one of the major concerns when designing circuits. To reduce power consumption, one commonly-used technique is to turn off power to the blocks within a chip that are not being used. For example, when a mobile phone is in idle mode, its FM receiver circuitry for listening to radios can be turned off. By turning off power to unused blocks, power consumption can be reduced considerably. To support such design needs, power specification languages like Unified Power Format (UPF) have been proposed to describe power intention when designing a chip.
One major problem with this power-off approach is that information in power-down blocks will be completely lost. When the block is needed again, it will be in a non-deterministic state, producing unpredictable circuit behavior. To address this problem, retention registers can be used. A retention register is a special type of register that can retain its value when the block is powered down. This is typically achieved by drawing power from an alternate power source that is still on when the block is powered down.
To verify that the power-down block will operate correctly after power-up, full retention can be implemented. In full retention, the value of every single register in the block is retained. In this manner, all of the information in the block is preserved during power-down and can be fully restored after power-up. However, this design implementation may not be optimal because some registers do not need retention if their values are updated before the registers are first read after power-up. Since retention registers draw more power and have a larger area, it is desirable to retain only a subset of all registers. This is called partial retention.
It is possible to manually inspect a design to select registers that do not need retention, however that is time-consuming and tremendously error-prone.